1. Field of Invention
The present invention relates to a flash memory and the fabrication method thereof. More particularly, the present invention relates to a three-dimensional flash array structure and the fabrication method thereof.
2. Description of Related Art
In the conventional flash memory structure, a gate comprises a floating gate for storing charges, and a control gate for controlling the data access. The floating gate is located between the control gate and the substrate, with the floating gate being in a floating state and isolated from other circuits while the control gate is connected to a word line. Each flash memory cell also has a drain connected to the bit line so as to control the flash memory cell.
Among many memory cell structures, an ETOX cell having a stacked gate is the most popular type of all, and it is programmed using a channel hot-electron (CHE) which passes through a source as well as a channel region and is erased through a Fowler-Nordheim (FN) tunneling effect.
However, the ETOX cell has a two-dimensional array structure with a smaller memory capacity in its unit area, so the memory capacitance is not easily increased.
Furthermore, the device integration can not be effectively increased with an isolation structure forming between the devices.